I was working on a painting at my desk today and realized at the end of the day I had been leaning on the edge of it with my forearm. I know have a red stinging spot on my arm where the pressure was and my forearm is killing me all the way into my thumb and fingers. How do I relieve this pain and what could it be? I know the leaning was the issue but did I anger a nerve? Help me

I don't really know if this is the sub to ask this, if it isn't, i'll remove the post (sorry in advance :) )

I have to do an assigment for class, creating a routine on arm5 assembly that multiplies two numbers and checks if there is an overflow (the format of the numbers is signed Q12). It should return (by r0) 0 if there isn't overflow and 1 if there is.

This code is form last year's solution of a fellow student, and i was just reviewing it bc, ngl, i'm pretty lost. But i do not understand anything. Why the lsr and lsl to the low part of the result of the multiplication? why comparing it then against 0?.

Thanks in advance.

https://preview.redd.it/ci3tcltnsavc1.png?width=220&format=png&auto=webp&s=2703c95fdb373dedec9beac2b31cab8fc76665e3

I am interested in learning about ARM embedded development, in pure C.

I have a Raspberry Pi Zero W, and an Arduino R4 WiFi, which are both ARM based. Would these be good starting points to to studying this topic? Which one of these two do you think would be more useful, difficult, easier, well documented, etc. Please tell me your opinions, thank you :)

hi, i have a tiva-c MC the TM4C123GXL to be precise , i tried flashing on it today and it gave me a strong static shock and wouldn't burn the code, what might be the reason?

This is a cool project I stumbled across that compiles a tiny subset of python into x86 assembly language: https://github.com/benhoyt/pyast64

Enjoy!

-Jeff

What is the fastest arm64 processor found on a laptop and available on the market right now?

EDIT: Apple silicon excluded.

Thanks

Hi there,

looking for a hardware recommendation for board / case etc for a home-built NVMe only NAS

Requirements:

• ARM-based, power efficient, no hardware-intensive tasks needed, something at the level or above a Raspberry 5

• must run a standard linux distribution and some docker containers

• 4x NVMe (more is fine) + eMMC or internal NVMe for OS

• decent build quality, good looking case, quiet

• optional: PoE powered, 60W can be delivered by my switch

price is not an issue

Looking forward to your recommendations. I looked at the new UGREEN NASync which has a nice x86-bases model with the DXP480T.

Str1atum

Is the most powerful ARM ITX(or micro-atx) board with pcie and UEFI support still the Coretex A72? Why can't other companies make ARM like Apple? Can I wait some board with Qualcomm?

Hi! I am searching for an ARM laptop and cant find the one for me. Why do I want ARM? I am interested in the architecture and absolutely want the long battery life. It should be 14 inch, have 4-8 GiB of RAM, preferably 8. It needs to be able to handle running stuff like Pulsar-edit or VScode, Firefox, and spotify at the same time without lag. I want to use it with either armbian or endeavourOS-arm. It should also have functioning bluetooth and wifi with these linux distros.

Do you have a recommendation?

I've got a MacBook Pro M2, and I'm facing a bit of a pickle. At work, my boss sent over an ancient Excel spreadsheet that relies on ODBC and a MYSQL connection. I've tried everything I can think of, but it seems that none of the Excel versions on my MacBook can handle it due to its age.

I attempted to tackle this by setting up a Windows 11 ARM virtual machine and installing Excel, ODBC, and the MYSQL connector. Unfortunately, no dice. Every time I try to open the spreadsheet, I get hit with a message about incompatible DNS architecture.

Has anyone else dealt with something like this before? Any suggestions on what I could try next?

(I'm not very proficient in English, so I did my best to explain the problem.)

As the title suggests, I’m looking for a decently powerful (around 3 gHz) ARM (or RISC) based SBC that has a PCIe or PCIe Mini expansion slot that I could put a GPU in and make my Linux dream machine?

Hi,I would love to develop (or find)quite cheap but power full,easy to use board computer that is open source (what can do) Parameters that would be nice: Speed: around 1GHz core maybe dual core Grafics: it would be nice to have easy to use gpu 2d rendering would do 3d would be bonus Memory: ram > 8MB Interface: i2c,analog,digital,spi,i2s at least 45 pins Wifi would be HUGE plus

The main part: Easy (enough) to program Visual studio IDE compatible RTOS capable C++ barebones

Im coming from ESP32 s3 but it wont cut it anymore and p4 isnt fast enough

For this:https://www.reddit.com/r/esp32/comments/1blz53a/new_huge_thread_about_esp_nottebook/

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Hey yall, so I know you can't virtualize x86 on ARM cuz they have a different instruction set, but based on what I have learned modern architectures are using a hybrid of complex and reduced instruction sets.

For example, x86 now has a RISC core with CISC compatibility layers ( From my limited understanding kind of like a hardware translation component ) Even ARM based chips have some more complex instructions for doing specific operations.

Now with software like QEMU I can emulate an x86 system on my phone, but its still pretty slow. So I was kind of wondering about something like "hardware accelerated emulation" wherein the x86 instruction set being emulated, through compiler optimization, gets some dedicated ARM instructions that significantly improve performance.

I'm currious about what a processor design specialist might think about this.

Hello all, I'm curious to know if there's any way to add threading support in the toolchain of arm cpp. I am trying to cross compile a rlottie graphics library for arm9 MCU IMX1050 using MCUXPRESSO IDE but I'm getting error like "std::mutex is not a member of std" I believe it is due to current toolchain doesn't support the threading is there any way to add threading or compile it other way around? I tried compiling it with different C++ standards (C++11 & 14).

What is the main difference between the two architectures to win favour of chip makers?

We could provide you with Rockchip mainstream platform sdk for Android&Linux and corresponding documents on hardware layout design，Gerber，ETC...

RK3588:Android 12&13 SDK &Linux 4.19/5.1 SDK+ Hardware Layout Reference Design

RK3566/RK3568 Android 11 SDK & Linux 4.19/5.1 SDK + Hardware Layout Reference Design

RK3288 Android 7 SDK + Hardware Layout Reference Design

RK3399 Android 7/9/10 SDK + Hardware Layout Reference Design

Feel free to contact me anytime.

I'm looking for examples of real-world machine code that could be used as bechmarks for some research work. This could be, for instance, snippets of C code where the programmer inlines some assembly to gain greater control of the system, eg when working with peripherals. Extra points if it's critical code that's prone to being buggy OR hard to show to be correct with just model checkers or any automatic proof tools.

Does anyone know of any samples in the public domain, perhaps bug-reporting websites or anywhere else where I might find this?

Thanks

What’s our thoughts on SoftBank being able to sell on March 12? Will they?

Between the lockouts and the shorts, is this a stock I sell? Or will the price stabilize at the higher value. I'm tempted to sell as I'm worried the stock will drop back down to 70 or $80 a share.

At the same time, I'm looking at histories of stocks that did this, and it looks like they only dropped a handful of percentage points after these sorts of games. I guess I'm going to hold. What are your thoughts?

Okay, so I'm supporting a very large bit mask in hardware. I'd love to treat it as just:

uint128_t bitmask;

and then be able to do things like:

!!(bitmask & (1 << bit_position))

to be able to test the value at a single bit position.

Unfortunately, I'm on a 32-bit ARM Cortex-M0+ platform, and uint128_t doesn't exist. ^((or does it?))

So, instead, I'm stuck with:

uint32_t bitmask[4];

Which is stored exactly the same way, and I have to do something even uglier like:

!!(bitmask[bit_position / 32] & (1 << (bit_position % 32)))

to get at individual bit values. Nevermind setting, clearing, or toggling the bits.

The compiler should be doing all of this for me behind the scenes. I can hide it somewhat with preproc macros, but that's also ugly as sin.

Is there a better best-practice for this kind of thing that I should know and use?